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sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 1 post office box 655303 ? dallas, texas 75265 members of the texas instruments widebus ? family state-of-the-art epic- ii b ? bicmos design significantly reduces power dissipation latch-up performance exceeds 500 ma per jesd 17 typical v olp (output ground bounce) < 1 v at v cc = 5 v, t a = 25 c distributed v cc and gnd pin configuration minimizes high-speed switching noise flow-through architecture optimizes pcb layout high-drive outputs (32-ma i oh , 64-ma i ol ) package options include plastic shrink small-outline (dl), thin shrink small-outline (dgg) packages and 380-mil fine-pitch ceramic flat (wd) package using 25-mil center-to-center spacings description the 'abt16646 devices consist of bus-transceiver circuits, d-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. these devices can be used as two 8-bit transceivers or one 16-bit transceiver. data on the a or b bus is clocked into the registers on the low-to-high transition of the appropriate clock (clkab or clkba) input. figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'abt16646 devices. output-enable (oe ) and direction-control (dir) inputs are provided to control the transceiver functions. in the transceiver mode, data present at the high-impedance port may be stored in either register or in both. the select-control (sab and sba) inputs can multiplex stored and real-time (transparent mode) data. the circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. the direction control (dir) determines which bus receives data when oe is low. in the isolation mode (oe high), a data can be stored in one register and/or b data can be stored in the other register. when an output function is disabled, the input function is still enabled and can be used to store and transmit data. only one of the two buses, a or b, can be driven at a time. to ensure the high-impedance state during power up or power down, oe should be tied to v cc through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. copyright ? 1999, texas instruments incorporated production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. widebus and epic- ii b are trademarks of texas instruments incorporated. sn54abt16646 . . . wd package sn74abt16646 . . . dgg or dl package (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1dir 1clkab 1sab gnd 1a1 1a2 v cc 1a3 1a4 1a5 gnd 1a6 1a7 1a8 2a1 2a2 2a3 gnd 2a4 2a5 2a6 v cc 2a7 2a8 gnd 2sab 2clkab 2dir 1oe 1clkba 1sba gnd 1b1 1b2 v cc 1b3 1b4 1b5 gnd 1b6 1b7 1b8 2b1 2b2 2b3 gnd 2b4 2b5 2b6 v cc 2b7 2b8 gnd 2sba 2clkba 2oe on products compliant to mil-prf-38535, all parameters are tested unless otherwise noted. on all other products, production processing does not necessarily include testing of all parameters.
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 2 post office box 655303 ? dallas, texas 75265 description (continued) the sn54abt16646 is characterized for operation over the full military temperature range of 55 c to 125 c. the sn74abt16646 is characterized for operation from 40 c to 85 c. function table inputs data i/o 2 operation or function oe dir clkab clkba sab sba a1a8 b1b8 operation or function x x x x x input unspecified store a, b unspecified x xx x x unspecified input store b, a unspecified h x x x input input store a and b data h x h or l h or l x x input disabled input disabled isolation, hold storage l l x x x l output input real-time b data to a bus l l x h or l x h output input stored b data to a bus l h x x l x input output real-time a data to b bus l h h or l x h x input output stored a data to bus 2 the data-output functions can be enabled or disabled by various signals at oe or dir. data-input functions always are enabled, i.e., data at the bus terminals is stored on every low-to-high transition of the clock inputs.
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 3 post office box 655303 ? dallas, texas 75265 l dir l clkab x clkba x sab x sba l real-time transfer bus b to bus a l dir h clkab x clkba x sab l sba x real-time transfer bus a to bus b x dir x clkab clkba x sab x sba x storage from a, b, or a and b l dir l clkab x clkba h or l sab x sba h transfer stored data to a and/or b x h x x xx x x x l h h or l x h x bus b bus a bus b bus a bus b bus a bus b bus a oe oe oe oe figure 1. bus-management functions
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 4 post office box 655303 ? dallas, texas 75265 logic symbol 2 1a2 6 1a3 8 1a4 9 1a5 10 1a6 12 1a7 13 1a8 14 2a2 16 2a3 17 2a4 19 2a5 20 2a6 21 2a7 23 2a8 24 5 1a1 1b6 45 1b7 44 1b8 43 1b2 51 1b3 49 1b4 48 1b5 47 1b1 52 4d 1 2 g12 31 2sba 30 2clkba 10 en8 [ba] 28 2dir g10 29 2b6 36 2b7 34 2b8 33 2b2 41 2b3 40 2b4 38 2b5 37 2oe 10 en9 [ab] 1 1 5 5 1 1 7 7 15 2a1 8 9 1 1 12 12 1 1 14 14 13d 2b1 42 11d c11 g14 26 2sab 27 2clkab c13 g5 54 1sba 55 1clkba 3 en1 [ba] 1 1dir g3 56 1oe 3 en2 [ab] c4 g7 3 1sab 2 1clkab c6 6d 2 this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12.
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 5 post office box 655303 ? dallas, texas 75265 logic diagram (positive logic) 1a1 1b1 1d c1 1d c1 one of eight channels 52 5 3 2 54 55 56 1 1sab 1clkab 1sba 1clkba 1dir 1oe to seven other channels 2a1 2b1 1d c1 1d c1 one of eight channels 42 15 26 27 31 30 29 28 2sab 2clkab 2sba 2clkba 2dir 2oe to seven other channels
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 6 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v cc 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i (except i/o ports) (see note 1) 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . voltage range applied to any output in the high or power-off state, v o 0.5 v to 5.5 v . . . . . . . . . . . . . . . . . . . current into any output in the low state, i o : sn54abt16646 96 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . sn74abt16646 128 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0) 18 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0) 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, q ja (see note 2): dgg package 81 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . dl package 74 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observe d. 2. the package thermal impedance is calculated in accordance with jesd 51. recommended operating conditions (see note 3) sn54abt16646 sn74abt16646 unit min max min max unit v cc supply voltage 4.5 5.5 4.5 5.5 v v ih high-level input voltage 2 2 v v il low-level input voltage 0.8 0.8 v v i input voltage 0 v cc 0 v cc v i oh high-level output current 24 32 ma i ol low-level output current 48 64 ma d t/ d v input transition rise or fall rate outputs enabled 10 10 ns/v t a operating free-air temperature 55 125 40 85 c note 3: all unused inputs of the device must be held at v cc or gnd to ensure proper device operation. refer to the ti application report, implications of slow or floating cmos inputs , literature number scba004.
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 7 post office box 655303 ? dallas, texas 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions t a = 25 c sn54abt16646 sn74abt16646 unit parameter test conditions min typ 2 max min max min max unit v ik v cc = 4.5 v, i i = 18 ma 1.2 1.2 1.2 v v cc = 4.5 v, i oh = 3 ma 2.5 2.5 2.5 v oh v cc = 5 v, i oh = 3 ma 3 3 3 v v oh v cc =45v i oh = 24 ma 2 2 v v cc = 4 . 5 v i oh = 32 ma 2* 2 v ol v cc =45v i ol = 48 ma 0.55 0.55 v v ol v cc = 4 . 5 v i ol = 64 ma 0.55* 0.55 v v hys 100 mv i i control inputs v cc = 5.5 v, v i = v cc or gnd 1 1 1 m a i a or b ports cc , icc 20 20 20 m i ozh 3 v cc = 5.5 v, v o = 2.7 v 10 10 10 m a i ozl 3 v cc = 5.5 v, v o = 0.5 v 10 10 10 m a i off v cc = 0, v i or v o 4.5 v 100 100 m a i cex v cc = 5.5 v, v o = 5.5 v outputs high 50 50 50 m a i o v cc = 5.5 v, v o = 2.5 v 50 100 180 50 180 50 180 ma v cc = 5.5 v, outputs high 2 2 2 i cc a or b ports v cc = 5 . 5 v , i o = 0, outputs low 32 32 32 ma v i = v cc or gnd outputs disabled 2 2 2 ? data in p uts v cc = 5.5 v, one input at 3.4 v, outputs enabled 50 50 50 d i cc ? data inp u ts , other inputs at v cc or gnd outputs disabled 50 50 50 m a control inputs v cc = 5.5 v, one input at 3.4 v, other inputs at v cc or gnd 50 50 50 c i control inputs v i = 2.5 v or 0.5 v 4 pf c io a or b ports v o = 2.5 v or 0.5 v 8 pf * on products compliant to mil-prf-38535, this parameter does not apply. 2 all typical values are at v cc = 5 v. 3 the parameters i ozh and i ozl include the input leakage current. not more than one output should be tested at a time, and the duration of the test should not exceed one second. ? this is the increase in supply current for each input that is at the specified ttl voltage level rather than v cc or gnd.
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 8 post office box 655303 ? dallas, texas 75265 timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see figure 2) sn54abt16646 v cc = 5 v, t a = 25 c min max unit min max f clock clock frequency 125 125 mhz t w pulse duration, clk high or low 4.3 4.3 ns t su setup time, a or b before clkab or clkba 3.5 4 ns t h hold time, a or b after clkab or clkba 0.5 0.5 ns timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see figure 2) sn74abt16646 v cc = 5 v, t a = 25 c min max unit min max f clock clock frequency 125 125 mhz t w pulse duration, clk high or low 4.3 4.3 ns t su setup time, a or b before clkab or clkba 3 3 ns t h hold time, a or b after clkab or clkba 0 0 ns
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 9 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, c l = 50 pf (unless otherwise noted) (see figure 2) sn54abt16646 parameter from (input) to (output) v cc = 5 v, t a = 25 c min max unit min typ max f max 125 125 mhz t plh clkba or clkab aorb 1.5 3.1 4 1 5 ns t phl clkba or clkab a or b 1.5 3.2 4.1 1 5 ns t plh aorb bora 1 2.3 3.2 0.6 4 ns t phl a or b b or a 1 3 4.1 0.6 4.9 ns t plh sab or sba 2 bora 1 2.9 4.3 0.6 5.3 ns t phl sab or sba 2 b or a 1 3.1 4.3 0.6 5.3 ns t pzh oe aorb 1 3.4 4.6 0.6 5.9 ns t pzl oe a or b 1.5 3.5 5.3 1 6 ns t phz oe aorb 1.5 3.9 5.6 1 6.4 ns t plz oe a or b 1.5 3.1 4.4 1 4.7 ns t pzh dir aorb 1 3.2 4.5 0.6 5.8 ns t pzl dir a or b 1.5 3.4 5.1 1 6.7 ns t phz dir aorb 2 4.2 5.9 1.2 7.1 ns t plz dir a or b 1.5 3.6 5.1 1 6.2 ns 2 these parameters are measured with the internal output state of the storage register opposite that of the bus input. switching characteristics over recommended ranges of supply voltage and operating free-air temperature, c l = 50 pf (unless otherwise noted) (see figure 2) sn74abt16646 parameter from (input) to (output) v cc = 5 v, t a = 25 c min max unit min typ max f max 125 125 mhz t plh clkba or clkab aorb 1.5 3.1 4 1.5 4.9 ns t phl clkba or clkab a or b 1.5 3.2 4.1 1.5 4.7 ns t plh aorb bora 1 2.3 3.2 1 3.9 ns t phl a or b b or a 1 3 4.1 1 4.6 ns t plh sab or sba 2 bora 1 2.9 4.3 1 5 ns t phl sab or sba 2 b or a 1 3.1 4.3 1 5 ns t pzh oe aorb 1 3.4 4.6 1 5.5 ns t pzl oe a or b 1.5 3.5 4.9 1.5 5.7 ns t phz oe aorb 1.5 3.9 4.9 1.5 5.4 ns t plz oe a or b 1.5 3.1 4.1 1.5 4.5 ns t pzh dir aorb 1 3.2 4.5 1 5.4 ns t pzl dir a or b 1.5 3.4 4.8 1.5 5.6 ns t phz dir aorb 2 4.2 5.7 2 6.7 ns t plz dir a or b 1.5 3.6 5.1 1.5 5.9 ns 2 these parameters are measured with the internal output state of the storage register opposite that of the bus input.
sn54abt16646, sn74abt16646 16-bit bus transceivers and registers with 3-state outputs scbs212d june 1992 revised july 1999 10 post office box 655303 ? dallas, texas 75265 parameter measurement information 1.5 v t h t su from output under test c l = 50 pf (see note a) load circuit s1 7 v open gnd 500 w 500 w data input timing input 1.5 v 3 v 0 v 1.5 v 1.5 v 3 v 0 v 3 v 0 v 1.5 v t w input voltage waveforms setup and hold times voltage waveforms propagation delay times inverting and noninverting outputs voltage waveforms pulse duration t plh t phl t phl t plh v oh v oh v ol v ol 1.5 v 1.5 v 3 v 0 v 1.5 v 1.5 v input 1.5 v output control output waveform 1 s1 at 7 v (see note b) output waveform 2 s1 at open (see note b) v ol v oh t pzl t pzh t plz t phz 1.5 v 1.5 v 3.5 v 0 v 1.5 v v ol + 0.3 v 1.5 v v oh 0.3 v 0 v 3 v voltage waveforms enable and disable times low- and high-level enabling output output t plh /t phl t plz /t pzl t phz /t pzh open 7 v open test s1 output control notes: a. c l includes probe and jig capacitance. b. waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. c. all input pulses are supplied by generators having the following characteristics: prr 10 mhz, z o = 50 w , t r 2.5 ns, t f 2.5 ns. d. the outputs are measured one at a time with one transition per measurement. 1.5 v figure 2. load circuit and voltage waveforms
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 5962-9450201qxa active cfp wd 56 1 tbd call ti level-nc-nc-nc 74abt16646dggre4 active tssop dgg 56 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16646dggr active tssop dgg 56 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16646dl active ssop dl 56 20 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16646dlr active ssop dl 56 1000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim sn74abt16646dlrg4 active ssop dl 56 1000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim snj54abt16646wd active cfp wd 56 1 tbd call ti level-nc-nc-nc (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs) or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 26-sep-2005 addendum-page 1
mechanical data mcfp010b january 1995 revised november 1997 post office box 655303 ? dallas, texas 75265 wd (r-gdfp-f**) ceramic dual flatpack 4040176 / d 10/97 48 leads shown 48 48 25 56 0.610 (18,80) 0.710 (18,03) 0.740 0.640 0.390 (9,91) 0.370 (9,40) 0.870 (22,10) 1.130 (28,70) 1 a 0.120 (3,05) 0.075 (1,91) leads** 24 no. of a min a max (16,26) (15,49) 0.025 (0,635) 0.009 (0,23) 0.004 (0,10) 0.370 (9,40) 0.250 (6,35) 0.370 (9,40) 0.250 (6,35) 0.014 (0,36) 0.008 (0,20) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a ceramic lid using glass frit. d. index point is provided on cap for terminal identification only e. falls within mil std 1835: gdfp1-f48 and jedec mo -146aa gdfp1-f56 and jedec mo -146ab
mechanical data msso001c ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 dl (r-pdso-g**) plastic small-outline package 4040048 / e 12/01 48 pins shown 56 0.730 (18,54) 0.720 (18,29) 48 28 0.370 (9,40) (9,65) 0.380 gage plane dim 0.420 (10,67) 0.395 (10,03) a min a max 0.010 (0,25) pins ** 0.630 (16,00) (15,75) 0.620 0.010 (0,25) seating plane 0.020 (0,51) 0.040 (1,02) 25 24 0.008 (0,203) 0.0135 (0,343) 48 1 0.008 (0,20) min a 0.110 (2,79) max 0.299 (7,59) 0.291 (7,39) 0.004 (0,10) m 0.005 (0,13) 0.025 (0,635) 0 ? 8 0.005 (0,13) notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). d. falls within jedec mo-118
mechanical data mtss003d january 1995 revised january 1998 post office box 655303 ? dallas, texas 75265 dgg (r-pdso-g**) plastic small-outline package 4040078 / f 12/97 48 pins shown 0,25 0,15 nom gage plane 6,00 6,20 8,30 7,90 0,75 0,50 seating plane 25 0,27 0,17 24 a 48 1 1,20 max m 0,08 0,10 0,50 0 8 56 14,10 13,90 48 dim a max a min pins ** 12,40 12,60 64 17,10 16,90 0,15 0,05 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold protrusion not to exceed 0,15. d. falls within jedec mo-153
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security telephony www.ti.com/telephony video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ? 2005, texas instruments incorporated

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